Graphene fails: Intel returns to copper from cobalt
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Graphene fails: Intel returns to copper from cobalt.
Recently, Intel presented a number of papers involving its Intel 4 (10nm) process at the 2022 IEEE VLSI Technology and Circuits Symposium.
One of them is that the new intel 4 uses copper interconnects.
Earlier, Intel originally intended to use cobalt (Co), a new material, in the interconnection of 10nm chips, but as we all know, Intel has experienced setbacks in the 10nm process, and the industry believes that integration problems with cobalt may be part of the reason for Intel’s 10nm delay problems .
In the past, we tended to only care about the size of the transistors, but now as chip scaling is gradually reaching its limit, the problem of chip interconnect can no longer be ignored.
The manufacturing of logic chips mainly includes three major processes: front-end process, middle-end process and back-end process.
The front-end process mainly deals with active devices in the chip. For example, the current mainstream process is FinFET;
the middle-stage process is usually composed of micro metal structures to connect the front-end and back-end processes;
chip interconnection belongs to the back-end process, that is, the chip is manufactured The final stage, the current mainstream technology is copper interconnect.
In fact, regarding the replacement of copper interconnects, the industry has explored many new materials, such as graphene, cobalt, ruthenium or molybdenum.
So, Intel’s return of cobalt and copper this time, does it prove that copper interconnects cannot be replaced?
Great copper interconnect
In the early days of the semiconductor industry, circuit lines were fabricated on silicon wafers by etching trenches into layers of silicon dioxide and filling them with aluminum metal.
But as the line width shrinks, the disadvantages of aluminum as a conductor become apparent.
By 1997, IBM was the first to switch from aluminum interconnects to copper wiring interconnects. On September 1, 1998, IBM announced the shipment of the world’s first copper-based microprocessor.
Originally designed from aluminum, the IBM PowerPC 750 operates at up to 300 MHz, and with copper interconnects, the same chip can reach speeds of at least 400 MHz, a 33 percent improvement.
This conversion is not easy, because copper atoms have easy diffusion characteristics in the dielectric layer, so first of all, a dielectric material with better insulating properties than silicon dioxide is required, and a thin tantalum nitride (TaN) barrier layer and a thin layer of tantalum nitride (TaN) are required.
A tantalum liner coats the trenches to prevent copper from diffusing into the dielectric.
To apply copper to wafers, materials scientists had to develop a new electrodeposition technique, because etching processes using aluminum do not work for copper.
The new method has two steps: depositing a thin copper seed layer to ensure complete coverage of the trench walls, followed by a more complete copper electrodeposition.
Under such efforts, copper has been adopted for many years starting from the circuit line width of 180nm.
IBM’s pioneering technology of using copper interconnects in microprocessors is now an industry standard, enabling the next generation of smaller, faster microprocessors.
The conductive resistance of copper wire is about 40% lower than that of aluminum wire, resulting in a 5% increase in microprocessor speed.
Copper wire is also significantly more durable and reliable by a factor of 100 over time and can be shrunk to a smaller size than aluminum wire.
Copper also offers the opportunity to add more interconnect layers using a completely different manufacturing process.
Until now, copper is still an important part of microprocessor design and development, and copper interconnects can also be used for 3D chip integration.
Cobalt (Co) is introduced
Until the 14nm or 10nm technology nodes, tungsten has been the primary material for electrical contact with metal/polysilicon gates and source and drain suicide regions on transistors.
But as the copper and tungsten layers get thinner, new problems for copper interconnects using tantalum nitride (TaN) are starting to appear.
One is electromigration, because running current (electrons) through ultra-fine wires dislocates copper ions, creating voids in the circuit and making chips prone to failure.
Another is that the resistance of the tantalum nitride layer is increasing, but due to the easy diffusion of copper, the resistance cannot be reduced by reducing the thickness of the tantalum nitride layer, otherwise the barrier function will be lost.
While transistor performance has been improving, copper wire resistance actually increases as the wire gets smaller.
That means the signal is slower, the distance traveled is reduced, and we’re consuming more energy than expected.
In other words, despite having higher performance transistors, there is a growing gap between transistor capability and wire capability. Copper wires have become a serious bottleneck.
So after 20 years, to the 10nm node, copper interconnects have begun to lose momentum.
So the new material cobalt (Co) began to be introduced. At IEDM 2017, Intel announced the first 10-nanometer technology to use pure cobalt interconnects in high-volume manufacturing.
Cobalt ranks 27th on the periodic table. Blue cobalt pigment was first used in Bronze Age art, but it wasn’t until 1735 that the Swedish chemist George Brandt isolated the metal. Cobalt is often used in batteries.
Russia is the second-largest cobalt producer, accounting for 4% of global supply.
So why cobalt?
Because at the 10nm node, using tungsten as the transistor contact metal becomes a performance bottleneck due to resistance and gap fill.
Likewise, local interconnects made with copper at the M0 and M1 layers suffer in terms of interstitial, resistance, and reliability—limiting performance and affecting the cost of making chips.
Replacing tungsten contacts and copper local interconnects with cobalt at 7nm and below foundry nodes can alleviate these performance bottlenecks.
Pure cobalt has good electromigration properties but poor line resistance. Likewise, copper alloys have better line resistance, but poorer electromigration life.
In the latest Intel 4, Intel has opted to use enhanced copper (eCu) in the lowest four metal layers.
This reinforced copper wire consists of a tantalum barrier, a pure copper core surrounding a cobalt cladding.
The eCU appears to be a win-win, offering better electromagnetic lifetime (although not as good as cobalt) compared to copper alloys while offering a small 0.85x increase in wire resistance.
For Intel 4, the company chose to use enhanced copper (eCu) for the bottom four metal layers.
This reinforced copper wire consists of a tantalum barrier and a pure copper core surrounding a cobalt cladding.
All in all, eCu seems to be an intermediate win-win – offering better electromagnetic lifetime than copper alloys (though not as good as cobalt alloys), while offering a modest 0.85x increase in wire resistance.
In fact, as early as 2014, chemists at Applied Materials found that cobalt “wet” copper better than tantalum.
By replacing the tantalum liner with cobalt, a cobalt cap is selectively deposited over the copper circuit wires, effectively encasing them in a cobalt sleeve.
As a result, the copper adheres better to the sides of the trench, minimizing later electromigration.
Applied Materials called the introduction of cobalt “the most significant interconnect material change in 15 years.”
In recent years, thin TiN barriers have been used for cobalt contacts.
Also in a line or via, having a thinner barrier and a shorter mean free path for cobalt (10nm vs 39nm for copper) results in a lower resistivity of the line (longer electron paths and scattering increases the net resistance).
Therefore, cobalt does not replace copper, but is used in combination with copper, so that the chip can continue to continue Moore’s Law.
After 2nm, ruthenium, bismuth or molybdenum are explored again
Chip scaling continues. After 2nm, the structure of transistors will undergo new changes, or FinFETs will be replaced by GAA nanosheets and CFETs.
At the same time, the architecture of copper interconnects will also need to be reconfigured to transmit power to transistors. .
The introduction of new metal materials will be the key to grasp the control of process precision, so chipmakers may replace copper with ruthenium (Ru) or molybdenum (Mo) to some extent after 2nm.
Ruthenium has the advantages of low resistivity, high melting point, acid corrosion resistance, and extremely low corrosion potential, making it an attractive next-generation interconnect material. Molybdenum is relatively cheaper.
The imec plan plans to use atomic channels (Atomic Channels), which use 2D materials with a thickness of one to multiple atomic layers.
The 2D material imce refers to is a semiconductor monolayer transition metal dichalcogenide (Dichalcogenide), with the chemical formula MX2.
M here is a transition metal element such as Mo (molybdenum) and W (tungsten). X is sulfur, Se selenium, Te (tellurium) and other sulfur selenide tellurium compounds (16 elements), imec has developed a process of less than 1 nanometer by using 2D materials and High NA EUV.
Taiwan University, TSMC and MIT jointly released major research results for chips below 1nm last year.
Using two-dimensional materials and semi-metal bismuth (Bismuth, chemical symbol Bi) may break through 1nm.
The two-dimensional material refers to It is molybdenum disulfide (Molybdenum disulfide, MoS2).
Bismuth material can greatly reduce resistance and increase current, making its performance comparable to silicon material, helping the semiconductor industry to meet the challenges of the next 1nm generation.
The research results were completed by Wu Zhiyi, a professor at the Department of Electrical Engineering and the Institute of Optoelectronics at National Taiwan University, together with research teams from TSMC and MIT.
A research paper entitled “Ultralow contact resistance between semimetal and monolayer semiconductors” has been published in the international journal Nature.
Whether it’s ruthenium, molybdenum, or semimetal bismuth, their main advantage is that they can eliminate liners and provide more trenches or pass-through volume for the primary metal. Reflow annealing or laser annealing can maximize grain size.
Graphene has been defeated
In fact, among the replacements for copper interconnects, the early voices of graphene are also very high.
There are many studies showing the potential of graphene, which is 100 to 300 times stronger than steel, has a maximum current density several orders of magnitude greater than copper, and is the strongest, thinnest, and by far the most reliable conductor of electricity on Earth.
The material, coupled with graphene’s large carrier mobility and thermal conductivity, combined with a smaller material volume, makes it a viable alternative to copper interconnects in electronic circuits.
Several research institutes and universities have demonstrated that graphene can improve the ability of materials to transport charges.
It also proved that graphene could one day replace traditional copper as the best material for interconnects that carry data and power around computer chips.
However, as far as the current industrial chain is concerned, graphene is not easy to manufacture, and end-to-end comparisons show that graphene flows unevenly and cannot achieve low resistance for enhanced copper interconnects.
How to achieve low-cost large-scale production of graphene is also a big problem.
The problems facing graphene are far more difficult than those that made copper integration difficult in the 1990s.
So we can see that the progress of graphene in recent years has not been so loud.
Can optical interconnects replace copper interconnects?
Now the topic of optical chips is very high, especially as electronic chips are approaching the limit of Moore’s Law, so optical chips have begun to enter the research field of the industry.
The copper vs. optical transmission medium debate began the moment people realized that photons could be used to transmit data.
Back in the 1970s, international telecom giants such as Bell replaced thousands of miles of copper telephone cables with fiber optics, and while fiber optic cables are widely available, optical backplane interconnects are still rare.
Optical chips are generally made of compound semiconductor materials (InP and GaAs, etc.), and realize the mutual conversion of photoelectric signals through the generation and absorption of photons accompanied by the internal energy level transition process.
It can be seen that the optical chip uses light waves to carry the information carrier.
Compared with electronic integrated circuits or copper interconnect technology, optical chips show lower transmission loss, wider transmission bandwidth, smaller time delay, and stronger anti-electromagnetic interference capability.
Therefore, in principle, it is natural that copper interconnects are not required.
So will optical interconnects replace copper interconnects? Mark Wade, CEO of Ayar Labs, an optical chip startup recently invested in by Intel and Nvidia, predicts that optical waveguides will begin to replace copper traces on PCBs in the next decade as shipments of optical I/O products increase.
However, pure photonic chips are still in the conceptual stage.
Strictly speaking, the current photonic chips should refer to optoelectronic fusion chips that integrate photonic devices or photonic functional units, which still need to be integrated with mature electronic chip technology. Intel is one of the early researchers of optical chips.
Its optical chips use co-packaged technology (co-Packaged), that is, optical chips and electrical chips are packaged on the same substrate, and optical connections are used between the chips.
So from the current point of view, optical interconnects will not replace copper interconnects so quickly, and optical chips still have a long way to go, to overcome many problems such as cost and power efficiency.
They won’t dominate until electronics fail, and they won’t happen anytime soon.
Driving Moore’s Law in the PC era often requires only a single process system solution. But in the era of mobile and AI, we have seen the development of integrated process systems.
Now it is not an era where just one enabling material is introduced to replace another, but a variety of materials work together to overcome the challenges brought by the chip miniaturization process. challenge to come.
In the future we will also see the scaling challenges faced by PPACs that need to be addressed through new and integrated materials.
But one thing is for sure, for now, copper interconnects are still the best solution, perhaps with cobalt, nickel, ruthenium or other platinum group noble metals as the bottom layer to assist them to continue to function, but copper interconnects still hard to be replaced.
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