August 9, 2022

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ARM original operating system: RISC OS still alive after 35 years

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ARM original operating system: RISC OS still alive after 35 years



 

ARM original operating system: RISC OS still alive after 35 years.

ARM original operating system is still actively updated in the name of RISC OS after 35 years.

As the operating system used by the original ARM computer Acorn Archimedes, RISC OS is still doing well today, 35 years later.

In June 1987, Acron introduced the Archimedes A305/A310 computers starting at £800. At that time, its product performance design was quite radical, and it provided a new operating system called Arthur at the time.

 

 

Dick Pountain excitedly reported in the PC World report – even with large applications loaded, it was able to handle it with ease and get things done in a split second.

 

But the connection between Arthur and Acorn’s early MOS (BBC Micro operating system) is actually quite interesting.

It only looks very different because of the prototype graphical desktop implemented in BBC BASIC.

 

In 1989, Arthur was renamed RISC OS and ushered in a second major release the following year.

The same year Sun started selling the £7,500 SPARCstation 1, and DEC also launched the £8,800 DECstation 3100 based on the MIPS R2000 chipset.

 

The RISC OS, however, has had a bumpy history, partly due to Acron’s spin-off of ARM and its eventual exit from the computer market. It was subsequently renamed Element 14 and then acquired by Broadcom.

 

It’s worth mentioning that ARM co-designer Sophie Wilson is still at work today, and this is related to the dramatic change in ownership of the operating system.

 

ARM original operating system: RISC OS still alive after 35 years

 

A fork of RISC OS that still has support for the unique 26-bit mode of the Acron era, but today it runs mostly on the commercial Virtual Acron emulator.

 

The other branch is designed for the 32-bit mode of recent ARM chips, now under the umbrella of RISC OS Developments, and fully open sourced in 2018.

 

Development and maintenance are carried out by the ROOL team at RISC OS Open Ltd, which currently provides download support for various existing ARM hardware (eg Titanium desktop).

 

If you don’t have the matching hardware, but want to experience a RISC OS in the 21st century, you might as well download a FOSS simulator called “RPCemu” to try it out.

 

At the same time, RISC OS Developments provides a special distribution for Raspberry Pi called RISC OS Direct, which is based on the latest stable version of ROOL (5.28) and provides various additional applications.

 

ARM original operating system: RISC OS still alive after 35 years

 

Now, RISC OS Developments is still actively developing new features for RISC OS.

For example, a new TCP/IP stack derived from OpenBSD recently released, which is characterized by bringing support for IPv6, but Wi-Fi support will have to wait for a while.

 

There is also a still-in-development Iris web browser with a RISC OS look and feel + WebKit engine for better compatibility with modern web, but it is only available to paid supporters.

But in addition to native browsers, we can also choose NetSurf and other applications.

 

The remaining limitations are mainly SMP. After all, as an operating system in the 1980s, it did not foresee the underlying support for mainstream multi-core processor technology in the 21st century (RISC OS actually only supports a single CPU core), and the official is currently working hard to solve this problem.

 

One of the experiments was getting NetBSD to run on another kernel, another experiment was getting Genode OS to run alongside RISC OS, and there was consideration to add support for SMP to the RISC OS kernel itself.

 

Finally, the only operating system Reg FOSS can think of that is still actively maintained and running on modern hardware is NeXTstep, the predecessor of Apple ‘s macOS.

 

Amazingly, the latest version of Apple Silicon Mac devices has also switched from Intel x86 CPUs to self-developed ARM chipsets.

 

 

News about RISC-V:

 

 

 

 

 



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